This study investigates the effects of the drain pocket (DP), underlap, and lightly doped drain (LDD) techniques on ambipolar current and overall performance in short-channel TFETs utilizing low-dimensional materials.
However, the first two methods increased short-channel effects (SCEs), indicating limited effectiveness in short-channel TFETs.
The third technique, LDD, despite decreasing the OFF-current, reduced the ambipolar current by only about 40 times.
This motivated the adoption of a hybrid approach to mitigate both SCEs and ambipolar current simultaneously.
A 4 nm DP decreases the ambipolar current by two orders of magnitude, and further increasing the DP length enhances this effect.
In this paper, we report a tunnel field-effect transistor (TFET) based on a zigzag antimonene nanoribbon (ZSbNR) with a 12 nm channel length, simulated using density functional theory (DFT). This study investigates the effects of the drain pocket (DP), underlap, and lightly doped drain (LDD) techniques on ambipolar current and overall performance in short-channel TFETs utilizing low-dimensional materials. However, the first two methods increased short-channel effects (SCEs), indicating limited effectiveness in short-channel TFETs. The third technique, LDD, despite decreasing the OFF-current, reduced the ambipolar current by only about 40 times. This motivated the adoption of a hybrid approach to mitigate both SCEs and ambipolar current simultaneously. The DP method shows strong capability in reducing ambipolarity. A 4 nm DP decreases the ambipolar current by two orders of magnitude, and further increasing the DP length enhances this effect. However, it also leads to a sharp increase in the OFF-current, degrading the subthreshold swing and severely limiting its applicability. The underlap method, by contrast, has a weaker influence on ambipolar suppression but causes less degradation in the OFF-state characteristics. When combined with the LDD technique, the underlap’s suppression effect is significantly enhanced, while its adverse impact on the OFF-current is mitigated. Specifically, employing a 3 nm underlap together with a 4 nm LDD with a modified doping concentration reduces the ambipolar current by more than 600 times, while keeping the OFF-current nearly unchanged compared to the initial TFET. Finally, the proposed hybrid approach reduces the intrinsic delay time by more than threefold, demonstrating its substantial effectiveness in improving the overall device performance.
